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US11757461B2

Continuous-time input-stage successive approximation register analog-to-digital …

University of Texas System

Abstract

The exemplified disclosure presents a successive approximation register analog-to-digital converter circuit that comprises a two-step (e.g., two-stage) analog-to-digital converter (ADC) that operates a 1st-stage successive approximation register (SAR) in the continuous time (CT) domain (also …

University
University of Texas System
Assignee
Board Of Regents, The University Of Texas System
Inventor
Linxiao Shen
Priority date
August 28, 2019
Filing date
February 12, 2020
Grant date
September 12, 2023
Publication date
September 12, 2023
Language
en
Metadata fetched
August 29, 2026 00:30