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US20060062232A1

Methods for memory assignment schemes and architecture for shareable parallel …

University of Texas System

Abstract

Systems and methods are described for high-speed memory assignment schemes for routing packets in a sharable parallel memory module based switch system. A method includes receiving a parameter, determining availability of memory location, determining if an available memory location is pre-assigned …

University
University of Texas System
Assignee
Board Of Regents, The University Of Texas System
Inventor
Sanjeev Kumar
Priority date
August 27, 2004
Filing date
August 26, 2005
Publication date
March 23, 2006
Language
en
Metadata fetched
August 29, 2026 00:18