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US20180323096A1

Systems and methods for passive alignment of semiconductor wafers

University of Texas System

Abstract

An example passive wafer alignment device can include a stage for holding a wafer, a plurality of pins arranged on the stage, the pins being arranged to contact respective portions of the wafer, and a preload device arranged on the stage. The preload device can be configured to apply a preload …

University
University of Texas System
Assignee
Board Of Regents, The University Of Texas System
Inventor
Michael CULLINAN
Priority date
November 03, 2015
Filing date
November 03, 2016
Publication date
November 08, 2018
Language
en
Metadata fetched
August 29, 2026 00:26