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US20250174528A1

Methods of packaging high voltage and high current power devices

University of Texas System

Abstract

An exemplary transistor outline package with a double-sided thermal plate is disclosed for double-sided pattern power electronic devices that employ a 3D double-sided cooling package. The exemplary transistor outline package provides spacer or pillar structures with wire bond-less interconnects …

University
University of Texas System
Assignee
Board Of Regents, The University Of Texas System
Inventor
Alex Q. Huang
Priority date
October 27, 2023
Filing date
October 28, 2024
Publication date
May 29, 2025
Language
en
Metadata fetched
August 29, 2026 00:35