QMOS digital logic circuits

University of Texas System

University: University of Texas System
Assignee: Board Of Regents Of The University Of Texas System
Inventor: Poras T. Balsara
Priority date: April 04, 1997
Filing date: March 31, 1998
Grant date: October 10, 2000
Publication date: October 10, 2000
Language: en
PDF source: https://patentimages.storage.googleapis.com/22/23/4d/8b0618b1feb4c6/US6130559.pdf
Metadata fetched: August 28, 2026 23:56